1. Field of the Invention
The present invention relates to a latch circuit, in particular, a technique which stably holds data in a latch circuit.
2. Description of the Related Art
In a conventional circuit such as an SRAM or a cache which is required to be highly integrated, data breakdown caused by an α radiation, a neutron radiation, or the like is viewed as a problem because the capacitance of a storage node is small. This problem is called a soft error. On the other hand, a latch circuit has a storage node having a relatively large capacitance, the soft error is not viewed as a serious problem up to now. However, with miniaturization of recent semiconductor devices, the capacitance of a storage node in a latch circuit tends to decrease, and resistance to a soft error is necessarily improved even in the latch circuit.
From a viewpoint of reduction in power consumption, a countermeasure such as a reduction in drive voltage is taken when the circuit is not operated. However, since the reduction in voltage causes a decrease in number of electric charges accumulated in the storage node of the latch circuit, data may be inverted by a small fluctuation of electric charge caused by power supply noise or the like.
As a countermeasure against a soft error, the following technique is publicly known. That is, data are held in a plurality of storage nodes, and, when one of the data is inverted, the inverted data is recovered by using the data in the remaining storage nodes. As a countermeasure against a soft error or a reduction in voltage, the following technique is publicly known. A capacitor element is connected to a storage node to increase the capacitance of the storage node in the latch circuit.
In the former, when a degree of integration of a semiconductor circuit further increases, a plurality of storage nodes are closely arranged. For this reason, the plurality of storage nodes are exposed to radiation to invert data even though an irradiation range of radiation is local, and normal data is in danger of being recovered. Furthermore, in a circuit configuration, data inversion caused by noise generated by a reduction in voltage still remains as a problem.
In the latter, although a countermeasure against a soft error and a reduction in voltage is taken, when logics of values held in a storage node and a capacitor element are different from each other, charge sharing occurs when the storage node and the capacitor element are connected to each other. For this reason, the value of the storage node becomes an intermediate potential, data may be inverted.